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 Single Phase Bidirectional Dual Element Power/Energy Metering IC with Pulse Output SA2007H
FEATURES + Two current sensor inputs + Dual pulse and energy direction outputs + No external crystal or resonator required + Performs bi-directional power and energy measurement + Meets the IEC 521/1036 Specification for Class 1 AC Watt
hour meters
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+ + + + +
Protected against ESD Total power consumption rating below 25mW Adaptable to different types of sensors Operates over a wide temperature range Precision voltage reference on-chip
DESCRIPTION
The SAMES SA2007H is a single phase bidirectional dual element energy metering integrated circuit. It provides a simple analog interface to a micro-controller and is specifically designed for meter manufacturers to have full control over the meter functionality. The SA2007H has two current sensor inputs. The power consumption on both inputs are continuously measured. A typical application would be to monitor Live and Neutral lines for tamper detection. For each current sensor input the SA2007H integrated circuit has a corresponding pulse output, each generating a pulse rate with a frequency proportional to the power consumption measured on the specific channel. The SA2007H performs active power measurement and takes the power factor into account. Energy consumption can be determined by the power measurement being integrated over time. The energy flow direction information is also available for each channel.
IIP1 IIN1
CURRENT CHANNEL 1
X POWER 1
POWER TO PULSE RATE
P1 D1 OMODE
IVP VOLTAGE AGND
OUTPUT CONTROL
RP INT
IIP2 IIN2
CURRENT CHANNEL 2
X POWER 2
POWER TO PULSE RATE
P2 D2 FMO
VOLTAGE REF. OSC
TIMING
dr-01623
VDD
VSS
VREF
TCLK
TEST
Figure 1: Block diagram
SPEC-0116 (REV. 1)
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SA2007H ELECTRICAL CHARACTERISTICS
(VDD = 2.5V, VSS = -2.5V, over the temperature range -10C to +70C#, unless otherwise specified.) Parameter Operating temp. Range Supply Voltage: Positive Supply Voltage: Negative Supply Current: Positive Supply Current: Negative Current Sensor Inputs (Differential) Input Current Range Voltage Sensor Input (Asymmetrical) Input Current Range Pin VREF Ref. Current Ref. Voltage Digital I/O Pins P1, P2, D1, D2, FMO, INT Output High Voltage Output Low Voltage Pins TCLK, TEST, OMODE, RP Input High Voltage Input Low Voltage Pulse Rate P1, P2 VOH VOL VIH VIL fp VDD-1 V V V V Hz Hz Hz s s A IIV -IR VR -25 45 1.1 50 +25 55 1.3 A A V III -25 +25 A Symbol TO VDD VSS IDD ISS Min -25 2.25 -2.75 5 5 Typ Max +85 2.75 -2.25 6 6 Unit C V V mA mA
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Condition
Peak value
Peak value With R = 24kW connected to VSS Reference to VSS
VSS+1
IOH = -2mA IOL = 5mA
VDD-1 1360 5 0 71.55 143.1 48
VSS+1 1600 3000
At rated input conditions Specified linearity Min and Max frequency Positive energy flow Negative energy V1 = VDD
Pulse Width P1, P2
tpp tpn IIL
Pins TCLK, TEST, RP, OMODE Pull down current
110
#Extended Operating Temperature Range available on request.
ABSOLUTE MAXIMUM RATINGS*
Parameter Supply Voltage Current on any pin Storage Temperature Operating Temperature Symbol VDD -VSS IPIN TSTG TO Min -0.3 -150 -40 -25 Max 6.0 +150 +125 +85 Unit V mA C C
*Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only. Functional operation of the device at these or any other condition above those indicated in the operational sections of this specification, is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability.
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SA2007H PIN DESCRIPTION
PIN 20 8 Designation AGND VDD Description
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Analog Ground. The voltage to this pin should be mid-way between VDD and VSS. Positive supply voltage. The voltage to this pin is typically +2.5V if a shunt resistor is used for current sensing or in the case of a current transformer a +5V supply can be applied. Negative supply voltage. The voltage to this pin is typically -2.5V if a shunt resistor is used for current sensing or in the case of a current transformer a 0V supply can be applied. Analog Input for Voltage. The current into the A/D converter should be set at 14ARMS at nominal mains voltage. The voltage sense input saturates at an input current of 25A peak. Inputs for current sensor - Channel 1 and Channel 2. The shunt resistor voltage from each channel is converted to a current of 16ARMS at rated conditions. The current sense input saturates at an input current of 25A peak. This pin provides the connection for the reference current setting resistor. A 24kW resistor connected to VSS sets the optimum operating condition. This logic input is used to select between latched or unlatched condition for the pulse and direction outputs. A logic input is used to reset the latched outputs which is required after an interrupt has occurred. The zero crossover of the voltage sense input is signaled on this pin. Configure / Test inputs. For normal operations these pins must be connected to VSS. This logic output will indicate a change in status of the pulse or direction outputs. Pulse outputs. The P1 and P2 outputs give instantaneous pulse outputs of channel 1 and channel 2 respectively. The pulse is active low with a pulse width of 71.5s for positive energy and doubles for reverse energy. Direction output. These outputs indicate the energy flow direction of each channel. No Connection.
14 19
VSS IVP
1, 2, 3, 4
IIN1, IIP1 IIN2, IIP2
5 6 7 9 10, 15 12 17, 13
VREF OMODE RP FMO TCLK, TEST INT P1, P2
18, 16 11
D1, D2 NC
ORDERING INFORMATION
IIN1 IIP1 IIN2 IIP2 VREF OMODE RP VDD FMO TCLK 1 2 3 4 5 6 7 8 9 10 20 19 AGND IVP
Part Number SA2007HPA SA2007HSA
Package DIP-20 SOIC-20
18 D1 17 16 15 P1 D2 TEST
14 VSS 13 12 11 P2 INT NC
DR-01620
Figure 2: Pin connections: Package: DIP-20, SOIC-20
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SA2007H FUNCTIONAL DESCRIPTION
The SA2007H is a CMOS mixed signal analog/digital integrated circuit, which performs power/energy calculations across a power range of 1000:1, to an overall accuracy of better than Class 1. The integrated circuit includes all the required functions for 1phase power and energy measurement such as oversampling A/D converters for the voltage and current sense inputs, power calculation and energy integration. Internal offsets are eliminated through the use of cancellation procedures. Referring to the block diagram (figure 1) the SA2007H has two current sense channels and a voltage sense channel. The voltage measured is multiplied with the current measured on the two channels. The multiplied signals from each current channel is fed to separate power to pulse rate blocks. The power to pulse rate blocks generate pulses at a frequency proportional to the instantaneous active power measured. Pulses on output P1 represent energy measured on current channel 1. The pulses on output P2 represent energy measured on current channel 2. Counting the pulses generated represents the energy measured. A typical application would be to simultaneous measure energy/power consumption in both Live and Neutral lines. A meter tamper condition could be detected when an imbalance exists between the live and neutral energy/power measured. Two modes of operation is available on the SA2007H, in one mode the device is functionally the same as two SA2002H devices sharing a common voltage channel. Alternatively the pulse output is latched and an interrupt is generated on any change of the pulse outputs.
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POWER CALCULATION In Figure 8, the voltage drops across the current transformers terminating resistors are converted to currents for each current sense input, by means of resistors R10 and R11 (channel 1) as well as R12 and R13. (channel 2). The current sense input saturates at an input current of 25A peak. The mains voltage (230VAC) is divided down through a divider to 14VRMS. The current into the A/D converter input is set at 14ARMS at nominal mains voltage, via resistor R7 (1MW). In this configuration, with a mains voltage of 230V and a current of 80A, the output frequency measured on P1 or P2 pin is 1360Hz. In this case the energy associated with a single pulse is 18.4kW/1360Hz = 13.5Ws per pulse. ANALOG INPUT CONFIGURATION The input circuitry of the current and voltage sensor inputs are illustrated in figure 3. These inputs are protected against electrostatic discharge through clamping diodes. The feedback loops from the outputs of the amplifiers AI and AV generate virtual shorts on the signal inputs. Exact duplications of the input currents are generated for the analog signal processing circuitry.
ELECTROSTATIC DISCHARGE (ESD) PROTECTION
The SA2007H integrated circuit's input's/outputs are protected against ESD.
POWER CONSUMPTION
The power consumption rating of the SA2007H integrated circuit is less than 30mW.
V DD
IIP
CURRENT SENSOR INPUTS
VSS VDD
AI
IIN
VSS VDD
IVP VOLTAGE SENSOR INPUT
V SS
AV
GND DR-01288
Figure 3: Analog input internal configuration
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INPUT SIGNALS
Voltage reference (VREF) A bias resistor of 24kW sets optimum bias conditions on chip. Calibration of the SA2007H should be done in the microcontrollers software. Output Mode (OMODE) The output behavior of the SA2007H is selectable between fixed width outputs or latched outputs. In fixed width mode the P1 and P2 output pulses stay at a fixed width. In latched mode the status of P1 and P2 are cleared with a logic 1 on the RP pin. Refer to the "Output signals in latched mode" section (Page 6) for further information. OMODE 0 1 Description IV Fixed width mode Latched mode IR = =
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OUTPUT SIGNALS
Pulse outputs (P1, P2) The output on P1 and P2 is a pulse density signal representing the instantaneous power/energy measurement as shown in figure 4. The pulse width tp on P1 and P2 change with the direction of energy measurement tp is 71.5s for positive energy and doubles (143S) if negative energy is measured. The output frequency may be calculated using the following formula: f = 11.16 x FOUT x ( II x I V ) / IR2 Where: FOUT= II =
Typical rated output frequency (1360Hz) Input current on current sense input (16A at rated conditions) Input current on voltage sense input (14A at rated conditions) Reference current on VREF typically 50A
Clear Interrupt (RP) A logic 1 on the RP input is used to clear the interrupt generated by the SA2007H when a pulse is generated on P1 or P2, while operating in latched mode. By clearing the interrupt in latched mode the status of the pulse outputs will also be cleared. Test Inputs (TEST, TCLK) For normal operations these pins must be connected to VSS.
An integrated anti-creep function does not allow output pulses on P1 or P2 if no power is measured by the device.
vMAINS
t
POWER VxI
t FOUT DR-01282 tP t
Figure 4: FOUT instantaneous pulse output Direction indication (D1, D2) The SA2007H provides information about the energy flow direction of both current channels separately on pins D1 and D2. Logic 0 on pin D1 or D2 indicates reverse energy flow of that particular channel. Reverse energy flow is defined as the condition where the voltage sense input and current sense input are out of phase (greater than 90 degrees).
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SA2007H
Positive energy flow, when voltage sense and both current sense input are in phase, is indicated on pin D1 or D2 as a logic 1. Figure 5 shows the behavior of D1 and D2, when energy reversal takes place. The time period for the direction signal to change state, tDIR, is the time it takes for the internal integrator to count (down) from its present value to zero. Thus the energy consumption rate determines the speed of change on the direction outputs.
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Interrupt (INT) While the SA2007H is operating in latched mode (see Output mode description) an interrupt is generated with the falling edge of the pulse outputs P1 and P2 (see figure 7). INT is cleared with a logic 1 on the RP input. OUTPUT SIGNALS IN LATCHED MODE Latched mode is selected by setting the OMODE input to logic 1. This mode is used with a micro controller to ensure that any simultaneous pulses on P1 and P2 are not missed. The functionality of the latched mode is shown in figure 7. An interrupt is generated with a falling edge on any of the pulse output signals P1 and P2. The micro controller needs to scan the status of the pulse outputs as well as the direction signals D1 and D2 during its interrupt service routine. The micro controller clears the interrupt by setting the RP input to a logic 1. The pulse outputs P1 and P2 are cleared along with the interrupt. Note that energy pulses are inhibited when the interrupt output is set (during latched mode).
FMO
I t
V t
D1, D2
DR-01283
t DIR
t
P1
Figure 5: Measured energy direction on D1 or D2 Mains zero crossing indication (FMO) The square wave signal of FMO indicates the polarity of the mains voltage. Due to comparator offsets, the FMO low to high transition can occur within a range as shown in figure 6. The time between successive low to high transitions will be equal to the mains voltage period.
P2
INT
RP dr-01621
Figure 7: Output signals in latched mode
V t
FMO t t MAINS
DR-01284
Figure 6: Mains zero crossing on FMO
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SA2007H TYPICAL APPLICATION
The analog (metering) interface shown in figure 8, is designed for measuring 230V/60A with precision better than Class 1. The most important external components for the SA2007H integrated circuit are the current sense resistors, the voltage sense resistors and the bias setting resistor. The resistors used in the metering section should be of the same type so temperature effects are minimized. Current Input IIN1, IIP1, IIN2, IIP2 Two current transformers are used to measure the current in the live and neutral phases. The output of the current transformer is terminated with a low impedance resistor. The voltage drop across the termination resistor is converted to a current that is fed to the differential current inputs of the SA2007H. CT Termination Resistor The voltage drop across the CT termination resistor at rated current should be at least 20mV. The CT's have low phase shift and a ratio of 1:2500. The CT's are terminated with a 3.6W resistor giving a voltage drop of 86.4mV across each termination resistor at rated conditions (Imax for the meter). Current Sensor Input Resistors The resistors R10, R11 and R12, R13 define the current level into the current sense inputs of the SA2007H. The resistor values are selected for an input current of 16A at rated conditions. For a 60A meter and a CT Ratio of 2500:1 the resistor values are calculated as follows: R10 = R11 = ( I / 16A ) x RSH / 2 = 60A / 2500 / 16A x 3.6W / 2 = 2.7kW IL = Line current RSH = CT Termination resistor 2500 = CT ratio The two current channels are identical so R10 = R11 = R12 = R13. Voltage Input IVP The voltage input of the SA2007H (IVP) is driven with a current of 14A at nominal mains voltage. This voltage input saturates at approximately 17A. At a nominal voltage current of 14A allows for 20% overdriving. The mains voltage is divided with a voltage divider to 14V that is fed to the voltage input pins via a 1MW resistor.
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Voltage Divider The voltage divider is calculated for a voltage drop of 14V. Equations for the voltage divider are: RA = R1 + R2 + R3 RA = R7 || (R5 + P1) Combining the two equations gives: (RA + RB) / 230V = RB / 14V Values for resistors R4 = 10W, R5 - 22kW and R7 - 1MW is chosen. Substituting the values result in: RB = 21.526kW RA = RB x (230V / 14V -1) RA = 332.12kW. Standard resistor values for R1, R2 and R3 are chosen to be 100kW, 100kW and 120kW. The capacitor C1 is used to compensate for phase shift between the voltage sense inputs and the current sense inputs of the device, in cases where CTs with phase errors are used. The phase shift caused by the CT may be corrected by inserting a capacitor in the voltage divider circuit. To compensate for a phase shift of 0.18 degrees the capacitor value is calculated as follows: C = 1 / (2 x p x Mains frequency x R5 x tan (Phase shift angle)) C = 1 / ( 2 x p x 50 x 1MW tan (0.18 degrees )) C = 1.013F Reference Voltage Bias resistor R6 defines all on chip and reference currents. With R6 = 24kW optimum conditions are set. Calibration should be done in the micro controller software.
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SA2007H
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NEUTRAL 1 LIVE L R4 T1 TZ1 D1 D3
U1 GND Vin Vout 3
VDD
R14 2
C2 GND
p
s
+ C5
+ C6
R15
D2 GND
D4
C3
R5 VSS R1 R2 R3 14V C1 CT2 R7 R8 R10 R11 CT1 R9 GND R12 R13 U2 1 2 3 4 5 VDD GND 6 7 R6 C4 10 VSS VSS Zero Crossings RST Interrupt 8 9 IIN1 IIP1 IIN2 IIP2 VREF OMODE RP VDD FMO TCLK SA2007H LIVE NEUTRAL GND IVP D1 P1 D2 TEST VSS P2 INT 20 19 18 17 16 15 14 13 12 11 VSS Energy Pulse CH2 Inrerrupt Energy Dir CH1 Energy Pulse CH1 Energy Dir CH1
Micro Controller
Figure 8: Application circuit showing metering section
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SA2007H
Parts List for Application Circuit: Figure 8
Item 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Symbol U2 D1 D2 D3 D4 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 C1 C2 C3 C4 C5 C6 CT1 CT2 T1 U1 TZ1 Description SA2007H Diode, Silicon 1N4148 Diode, Silicon 1N4148 Diode, Silicon 1N4148 Diode, Silicon 1N4148 Resistor, 100k, 1/4W, 1%, metal Resistor, 100k, 1/4W, 1%, metal Resistor, 120k, 1/4W, 1%, metal Resistor, 10W, 2W, Wire wound Resistor, 24k, 1/4W, 1%, metal Resistor, 24k, 1/4W, 1%, metal Resistor, 1M, 1/4W, 1%, metal Resistor, 3.6W, 1/4W, 1%, metal Resistor, 3.6W, 1/4W, 1%, metal Resistor, 2.7k, 1/4W, 1%, metal Resistor, 2.7k, 1/4W, 1%, metal Resistor, 2.7k, 1/4W, 1%, metal Resistor, 2.7k, 1/4W, 1%, metal Resistor, 1k, 1/4W Resistor, 1k, 1/4W Capacitor Capacitor, 220nF Capacitor, 220nF Capacitor, 820nF Capacitor, 2200F, 25V, electrolytic Capacitor, 100F, 16V, electrolytic Current Transformer Current Transformer Transformer, 230V/9V 78LC05, Voltage regulator 400V, Metal oxide varistor
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Detail DIP-20/SOIC-20 or Similar or Similar or Similar or Similar
Note 2 Note 2 Note 1 Note 1 Note 1 Note 1
Note 4
Note 3
Note 1: Resistor (R10, R11, R12 and R13) values are dependent upon the selected value of R8 and R9 Note 2: See TYPICAL APPLICATION when selected the value of R8 and R9. Note 3: Capacitor (C4) to be positioned as closed to Supply Pins (VDD & VSS) of U-1, as possible. Note 4: Capacitor (C1) selected to minimize phase error introduced by current transformer (typically 1.5F for normal CTs)
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SA2007H PM9607AP DISCLAIMER:
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The information contained in this document is confidential and proprietary to South African Micro-Electronic Systems (Pty) Ltd ("SAMES") and may not be copied or disclosed to a third party, in whole or in part, without the express written consent of SAMES. The information contained herein is current as of the date of publication; however, delivery of this document shall not under any circumstances create any implication that the information contained herein is correct as of any time subsequent to such date. SAMES does not undertake to inform any recipient of this document of any changes in the information contained herein, and SAMES expressly reserves the right to make changes in such information, without notification, even if such changes would render information contained herein inaccurate or incomplete. SAMES makes no representation or warranty that any circuit designed by reference to the information contained herein, will function without errors and as intended by the designer.
Any sales or technical questions may be posted to our e-mail address below: energy@sames.co.za
For the latest updates on datasheets, please visit our web site: http://www.sames.co.za. SOUTH AFRICAN MICRO-ELECTRONIC SYSTEMS DIVISION OF LABAT TECHNOLOGIES (PTY) LTD Tel: (012) 333-6021 Tel: Int +27 12 333-6021 Fax: (012) 333-8071 Fax: Int +27 12 333-8071
P O BOX 15888 33 ELAND STREET LYNN EAST 0039 REPUBLIC OF SOUTH AFRICA
33 ELAND STREET KOEDOESPOORT INDUSTRIAL AREA PRETORIA REPUBLIC OF SOUTH AFRICA
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